Inside every EUV lithography machine, a generator fires molten tin droplets about 25 microns across at 70 metres per second. A laser hits each droplet twice — once to flatten it, once to vaporise it into plasma. That plasma emits light at a wavelength of 13.5 nanometres. According to ASML’s own description of the process, this happens 50,000 times every second, continuously, for years.

That is the light source. It is arguably the simplest part of the machine.

Only one company on Earth builds these systems. A single next-generation unit costs around $380–400 million, weighs roughly 330,000 pounds, and ships in about 250 crates. Every advanced processor in every phone and AI server passes through one. This article explains how EUV lithography works, why nobody has replicated it, where High-NA stands as of late 2026, and why the whole thing has become a geopolitical instrument.

What lithography does, and why wavelength decides everything

Chipmaking is fundamentally photographic. A pattern is drawn on a mask, light is projected through optics to shrink that pattern, and it is printed onto a silicon wafer coated in light-sensitive resist. Etching and deposition steps then turn the printed pattern into physical structures. A modern chip requires this cycle to be repeated for dozens of layers.

The limit on how small a feature you can print is set largely by the wavelength of the light and the numerical aperture of the optics — how wide a cone of light the lens or mirror system can gather. Shorter wavelength and higher numerical aperture both mean finer resolution.

For years the industry used deep ultraviolet light at 193 nanometres, then squeezed far below that wavelength using immersion optics and clever tricks. Extreme ultraviolet at 13.5nm is roughly fourteen times shorter, and it is what made sub-7nm-class chips practical.

Why 13.5nm light is so difficult

Here is the problem that makes EUV genuinely hard rather than merely expensive: extreme ultraviolet light is absorbed by essentially every material, including air. You cannot use lenses, because the light will not pass through glass. You cannot even let it travel through the atmosphere.

So the entire optical path runs in a vacuum, and every optical element is a mirror. But ordinary mirrors do not reflect EUV either. ZEISS, which makes the optics, builds them by vapour-depositing alternating layers of molybdenum and silicon only a few atoms thick — up to 100 layers — so that reflections from each interface reinforce one another. Even then, reflectivity tops out at around 70%.

Compound that. With six mirrors in the projection optics alone, roughly 0.7 to the sixth power of the light survives — around 12%. This is why EUV light sources must be so absurdly powerful, and why droplet vaporisation happens 50,000 times a second.

The mirrors

The mirrors also have to be almost perfectly smooth, because at 13.5nm any bump scatters light and blurs the image. ZEISS describes the precision with two illustrations: scaled up to the size of Germany, the largest surface irregularity would be about 0.1mm tall; and one of these mirrors aimed at the Moon could hit a ping pong ball on its surface. The illumination system alone comprises around 15,000 individual parts weighing 1.5 tonnes, with about 20,000 more parts and 2 tonnes in the projection optics.

Why only ASML makes these machines

ASML’s monopoly is not the result of a patent thicket or a single invention. It is the result of about three decades of integration across a supply chain that no single company owns.

• Optics come from ZEISS in Germany, which spent decades developing the multilayer mirror technology. ASML and ZEISS have a deeply entangled relationship, and ASML has taken a stake in the relevant ZEISS business.
• The drive laser — a high-power carbon dioxide laser system — comes largely from TRUMPF, also German.
• The light source technology came in part from Cymer, a US company ASML acquired in 2013.
• The system integration, metrology, wafer stages and control software are ASML’s own.

Rebuilding this would mean recreating not one machine but the entire ecosystem of specialist suppliers behind it, along with the accumulated process knowledge that only exists inside the people who built it. Nikon and Canon, once dominant in lithography, chose not to pursue EUV. Chinese efforts are underway and have produced research-scale progress, but nothing near production capability at the time of writing.

The financial scale gives some sense of the concentration: ASML reported €32.7 billion in net sales and €9.6 billion in net income for 2025, shipping 300 new lithography systems, with a year-end backlog of €38.8 billion. For 2026 it guided €36–40 billion.

Standard EUV versus High-NA

Today’s mainstream EUV scanners are the NXE series, with a numerical aperture of 0.33 and a resolution of about 13nm. High-NA is the EXE series, with a numerical aperture of 0.55 and a resolution of about 8nm, according to ASML’s product documentation.

Raising the numerical aperture required a redesign with a catch. High-NA uses anamorphic optics with 8x magnification in one direction rather than 4x, which halves the printable field on the wafer. Chipmakers must either design smaller dies or stitch two exposures together.

	NXE (0.33 NA)	EXE High-NA (0.55 NA)
Numerical aperture	0.33	0.55
Resolution	~13 nm	~8 nm
Field size	Full field	Half field (anamorphic 8x)
Approximate cost	Substantially lower; ASML does not publish list prices	About $380–400M per system
Reported throughput	~170 wafers/hour	135 wph with stitching; higher for small dies

The multipatterning tradeoff

This is the central economic argument in advanced lithography, and it does not have an obvious answer.

If a feature is too fine for a single 0.33 NA exposure, you can print it in two or more passes with separate masks — multipatterning. That works, but each extra pass adds a mask, adds process steps, adds cost, and adds overlay error, since the two patterns must align to within a few nanometres.

High-NA prints in one pass what would otherwise take two or three. The counter-argument, laid out in Semiconductor Engineering’s analysis, is that the machine costs roughly twice as much, and stitching cuts throughput to about 135 wafers per hour against roughly 170 for the older tools. Whether High-NA is cheaper per finished layer depends on the specific layer, the die size, and how many exposures it replaces.

The industry has genuinely split on this. Intel adopted High-NA early and aggressively. TSMC has said its roadmap through 2029 — including its A12 and A13 nodes — does not require High-NA, betting that multipatterning with existing tools remains more economical. Both companies employ very good people and they disagree.

Where High-NA actually stands in 2026

As of September 2026, reporting compiled by TrendForce indicated ten High-NA systems running at four customers, with three more shipping and installing, and that the installed fleet had collectively exposed more than 1.35 million wafers. The qualified EXE:5200B reached 135 wafers per hour in acceptance testing, with ASML’s roadmap projecting 160 and then 175 wph on later revisions.

Intel is the furthest along, having taken the first tools and having tied its 14A node to High-NA. SK hynix has installed an EXE:5200B in a DRAM fab. Samsung is targeting adoption closer to the end of the decade. The research institute imec received an EXE:5200 in 2026, described as one of fewer than a dozen units worldwide, with full qualification targeted for Q4 2026. Reporting on the wider fleet points to mass production use arriving around 2027–2028.

Fewer than a dozen. That is the total global population of the most advanced manufacturing machine ever built.

Installing one is its own engineering project

When Intel installed its first High-NA tool in Oregon, the machine arrived in about 250 crates, weighed in the neighbourhood of 330,000 pounds, and took roughly 250 ASML and Intel engineers around six months to assemble — with weeks or months of calibration still to follow.

This has a consequence people often miss when they talk about “just building fabs somewhere else.” You cannot buy capacity quickly. Even with unlimited money and a willing seller, the lead time from order to production wafers runs to years, and ASML’s output is finite.

Throughput, yield and why chips still cost what they do

A fab’s economics run on machine hours. A scanner costing several hundred million dollars must be exposing wafers essentially all the time to justify itself, which is why throughput figures dominate the High-NA debate more than resolution does.

Yield compounds on top. A leading-edge chip may pass through EUV steps for many layers, and every one is an opportunity for a defect. Because defects scale with area, big dies — exactly the AI accelerators everyone wants — yield worst. This is a major reason the industry moved to chiplets: several small dies, each with good yield, assembled into one package.

High-NA’s halved field interacts with this directly. A design too large for a single High-NA exposure must be stitched or split. Chiplet-based designs are structurally better suited to High-NA than giant monolithic dies, which is a real if under-discussed argument in its favour.

The geopolitics

Because EUV has exactly one supplier in exactly one country, it became the most effective chokepoint in technology policy. The Netherlands has not licensed EUV exports to China, meaning Chinese fabs have no legal path to the tools required for leading-edge logic.

The restrictions have kept tightening, and the pressure point has moved to the older equipment. Reporting in 2026 described US efforts to push the Netherlands further, including proposed legislation that would bar ASML from selling even its older DUV machines to China, and to restrict servicing of tools already delivered. That last point matters more than it sounds: these systems need continuous maintenance and consumables, so service access is itself a lever.

Two honest caveats. First, export controls have visibly slowed China’s leading-edge progress but have not stopped domestic capability development, and Chinese firms have produced advanced chips using multipatterned DUV at considerable cost. Second, ASML’s China business has been a significant share of its revenue, so every tightening carries commercial consequences for the company enforcing it.

What this means for you

If you buy consumer electronics, EUV is the reason prices for leading-edge silicon do not fall the way they used to. When one supplier gates the industry’s most critical input and demand outstrips supply, cost per transistor stops dropping. Expect flagship devices to keep getting better rather than cheaper.

If you follow chip policy or invest in the sector, the useful metric is not fab announcements but tool deliveries. A fab is a building; the scanners inside it are the actual capacity, and ASML publishes how many it ships. Watch ASML’s bookings and backlog for a leading signal on what the industry expects two years out.

If you work in engineering or manufacturing, the transferable lesson is how much of this advantage is organisational rather than proprietary. ASML’s position rests on decades of coordinated supplier relationships and accumulated process knowledge — a kind of moat that money alone cannot cross quickly.

Frequently asked questions

Why can’t another company just build an EUV machine?

The barrier is the whole supply chain, not one invention. It requires ZEISS-grade optics, TRUMPF-grade lasers, a stable high-power tin plasma source, nanometre-precision stages, and thirty years of debugging. Competitors like Nikon and Canon opted out of EUV entirely.

Is High-NA EUV strictly better than standard EUV?

No. It resolves finer features in one exposure, but costs roughly twice as much, has a halved field size, and currently lower throughput. Whether it wins depends on the layer and the design. TSMC has publicly concluded it does not need High-NA through 2029; Intel disagrees.

How many EUV machines exist?

Standard 0.33 NA EUV systems number in the several hundreds, built up over years — ASML shipped 300 lithography systems of all types in 2025. High-NA systems are far rarer: reporting in September 2026 indicated ten running at four customers, with three more in transit or installation.

Does EUV use radioactive material or produce radiation?

No. The tin plasma emits extreme ultraviolet light, which is high-energy but non-ionising in the sense people usually worry about, and the machines are heavily shielded and run in vacuum. There is no nuclear material involved.

Can China build its own EUV system?

Not at production scale as of 2026. Research programmes exist and have reported progress on components, but a production EUV scanner requires the full optics, source, stage and metrology stack working together at commercial reliability. Most analysts see that as a many-year effort.

One machine, one supplier, one bottleneck

EUV lithography is the point where the entire digital economy narrows to a single production line in Veldhoven. Every AI accelerator, every flagship phone processor, every leading-edge CPU depends on machines that vaporise tin 50,000 times a second and bounce the resulting light off mirrors polished to atomic tolerance, in a vacuum, for years without stopping.

The next few years will settle the High-NA question. If Intel’s bet pays off, the halved field and the price tag will look like an acceptable toll for single-exposure patterning. If TSMC is right, multipatterning with cheaper tools will hold the line for another node or two. Either way, the machines will be built in one country by one company, and that fact will keep shaping trade policy as much as engineering.

Sources

• ASML — Light and lasers: lithography principles
• ASML — EUV lithography systems
• ASML — 2025 full-year and Q4 financial results
• ASML — Q1 2026 financial results
• ZEISS SMT — EUV lithography and technology
• Semiconductor Engineering — Multi-patterning EUV vs. High-NA EUV
• TrendForce — ASML advances High-NA EUV toward high-volume manufacturing
• TrendForce — imec secures ASML’s most advanced EXE:5200 High-NA EUV
• Tom’s Hardware — Intel installs ASML’s High-NA lithography machine in Oregon
• NL Times — US preparing to force Netherlands to ban ASML from selling to China
• Tom’s Hardware — TSMC roadmap through 2029, without High-NA EUV

Image credit: Photo: Uploaded by Duk 08:45, 16 Feb 2005 (UTC) — Public domain (via Wikimedia Commons)